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The LOGDAC® AD7118 is a CMOS multiplying D/A con- verter which attenuates an analog input signal over the range 0 to –85.5 dB in 1.5 dB steps. The analog output is determined by a six-bit attenuation code applied to the digital inputs. Operating frequency range of the device is from dc to several hundred kHz. The device is manufactured using an advanced monolithic silicon gate thin-film on CMOS process and is packaged in a 14-pin dual-in-line package.
The AD7112 is a monolithic dual multiplying D/A converter featuring wide dynamic range and excellent DAC-to-DAC matching. Both DACs can attenuate an analog input sig- nal over the range 0 dB to 88.5 dB in 0.375 dB steps.
LOGDAC is a type of digital to analog converter of analog devices. AD7111/AD7111A are two products in the LOGDAC series. They have a wide dynamic range and a small size. AD7111/AD7111A can attenuate analog input signals over the range 0dB to 88.5dB in 0.375dB steps. Both AD7111/AD7111A provide 16-pin DIPs and SOIC packages, and AD7111 also provides 20-terminal LCCC package.
The AD708 is a high precision, dual monolithic operational amplifier. Each amplifier individually offers excellent dc precision with maximum offset voltage and offset voltage drift of 30 μV and 0.3 μV/°C respectively. The AD708 has a minimum open-loop gain of 5 million V/V, a minimum CMRR of 130 dB and a minimum PSRR of 120 dB.
AD708 is a high precision dual monolithic operational amplifier from AD company. Its maximum output offset voltage is 30uV, offset voltage drift is 0.3uV/℃, maximum input offset voltage is 0.35uV p-p, open loop gain is 5V/uV, maximum input voltage is 2.2V, and maximum output voltage is 20V.
The AD708 is a dual monolithic operational amplifier from Analog Devices with ultra-high DC precision, minimum input bias current, minimum offset voltage drift and minimum voltage noise.
AD7303 is a 8-bit dual channel voltage output DAC from AD company. It works at a supply voltage of +2.7V to +5.5V and uses a three-wire serial interface. AD7303 has built-in 2.5V and 1.25V reference voltages and supports external reference voltage input. AD7303 uses on-chip output buffers, the output voltage range is 0V to VREF, and it can achieve rail-to-rail output. AD7303 has low power consumption characteristics, full power current is 2.3mA, and it is 1uA when turned off. AD7303 is suitable for battery-powered portable instruments, digital gain and offset adjustment, programmable voltage and current sources, and programmable attenuators.
The AD707 is a low drift operational amplifier from Analog Devices. It features very high DC precision, low offset voltage, low offset voltage drift and low noise, making it ideal for precision instrumentation applications.
AD706 is a dual-channel low-power bipolar op amp that has the low input bias current of a BiFET amplifier, but which offers a significantly lower IB drift over temperature
The AD705 is a low power bipolar op amp that has the low input bias current of a BiFET amplifier but which offers a significantly lower IB drift over temperature.
The document introduces the characteristics of the AD704 product, including high precision, low offset voltage, low offset voltage drift, low input bias current, low noise and low power consumption.
This document introduces the system architecture of the AD20msp410 GSM baseband processing chipset, including the algorithm signal processor, physical layer processor, microcontroller, baseband converter, radio subsystem, ROM, RAM, EEPROM, keyboard, and SIM card.
The AD7013 is a complete low power, CMOS, TIA IS-54 baseband receive port with single +5 V power supply. The part is designed to perform the baseband conversion of I and Q waveforms in accordance with the American (TIA IS-54) Digital Cellular Telephone system. The receive path consists of two high performance sigma-delta ADCs, each followed by a FIR digital filter. A primary and auxiliary set of IQ differential analog inputs are provided, where either can be selected as inputs to the sigma-delta ADCs. Also, a choice of two frequency responses are available for the receive FIR filters; a Root-Raised-Cosine filter for digital mode or a brick wall response for analog mode. Differential analog inputs are provided for both I and Q channels. On-chip calibration logic is also provided to remove either on-chip offsets or remove system offsets. A 16-bit serial interface is provided, interfacing easily to most DSPs. The receive path also provides a means to vary the gain of the receive path.
