ST 74LVC245A handbook
Update: 30 September, 2023
74LVC245A is a low voltage CMOS octal bus transceiver (3-state) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. This IC is intended for two-way asynchronous communication between data buses and the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. It has more speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.
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MD5 Checksum: EAB2E5D425AAA7F8D1D13D7FA48993DD
Publication date: 10 August, 2012
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ST 74LVC245A handbook PDF