ST 74LVX20 handbook
Update: 28 September, 2023
The document introduces a low voltage CMOS dual 4-input NAND gate, which is suitable for low power, battery operated and low noise 3.3V applications. The product is fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology, and it provides high noise immunity and stable output. Power down protection is provided on all inputs, and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
File format: PDF
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MD5 Checksum: 0ED4543416E46454EEC1B073F7114A27
Publication date: 10 August, 2012
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ST 74LVX20 handbook PDF