Update: 30 September, 2023
The 74LCX138 is a low voltage CMOS 3 to 8 line decoder (inverting) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for inputs. If the device is enabled, 3 binary select inputs (A, B and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go to high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
File format: PDF
Size: -
MD5 Checksum: 2340794284CFB246DBC6463C7E627699
Publication date: 10 August, 2012
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PDF Link: ST 74LCX138 handbook PDF