ST 74V1T125 handbook

Update: 29 September, 2023

This document describes the features and characteristics of the 74V1T125 single bus buffer, including high-speed performance, low power dissipation, compatibility with TTL outputs, etc. It is fabricated with high-speed CMOS technology and has power down protection on inputs. This device can be used to interface 5V to 3V.

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File format: PDF

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MD5 Checksum: 8341B53AC25BE5A6EA5BD139C1E069EF

Publication date: 10 August, 2012

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PDF Link: ST 74V1T125 handbook PDF