Update: 30 September, 2023
The M74HC4017 is a high speed CMOS decade counter/divider fabricated with silicon gate C2MOS technology. The M74HC4017 is a 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition of the clock input. Each output stays high for one clock period of the 10 clock period cycle. The CARRY output goes low to high after OUTPUT 10 goes low, and can be used in conjunction with the CLOCK ENABLE (CKEN)to cascade several stages. The CLOCK ENABLE input disables counting when in the high state. A CLEAR (CLR) input is also provided which when taken high sets all the decoded outputs low. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
File format: PDF
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MD5 Checksum: 9A3CE5DEA707C4E906ABC5CAB68D38A0
Publication date: 10 August, 2012
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PDF Link: ST M74HC4017 handbook PDF