ST TS556 Low-power dual CMOS timer handbook

Update: 28 September, 2023

This document describes the features and characteristics of the TS556 low-power dual CMOS timer, revised in October 2008. It includes very low power consumption, high maximum astable frequency, wide voltage range, reduced supply current spikes during output transitions, high input impedance, and pin-to-pin and functionally compatibility with the bipolar NE556.


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MD5 Checksum: 5C95D81DD5DB20D60C88214164921531

Publication date: 09 August, 2012

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PDF Link: ST TS556 Low-power dual CMOS timer handbook PDF

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