Update: 28 September, 2023
The STLVD111 is a programmable low voltage 1:10 differential LVDS clock driver with 100ps part-to-part skew and 50ps bank skew. It features a differential design that meets LVDS specifications for driver outputs and receiver inputs. The driver has a reference voltage available output VBB, a low voltage VCC range of 2.375V to 2.625V, high signalling rate capability (exceeds 622MHz), support for open, short and terminated input fail-safe (low output state), and programmable drivers power off control.
File format: PDF
Size: -
MD5 Checksum: 3A854B1EB47898D5C8BA3E6A5B5F7623
Publication date: 08 August, 2012
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PDF Link: ST STLVD111 Programmable low voltage 1:10 differential LVDS clock driver handbook PDF