ST 74V2G132 handbook

Update: 01 October, 2023

74V2G132 is a high-speed CMOS dual 2-input NAND gate fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Pin configuration and function are the same as those of the 74V2G00 but the 74V2G132 has hysteresis. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.

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File format: PDF

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MD5 Checksum: A32CF8F2B380D685A7B72A1CCA722A28

Publication date: 08 August, 2012

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PDF Link: ST 74V2G132 handbook PDF