ST 74V1T77 handbook

Update: 29 September, 2023

The document describes the features and characteristics of a high-speed CMOS single D-type latch, including high-speed transmission rate, low power dissipation, compatibility with TTL outputs, etc. The product is designed to operate from 4.5V to 5.5V, making it ideal for portable applications.

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File format: PDF

Size: -

MD5 Checksum: 84363E59D339A29F39D835498A54037A

Publication date: 08 August, 2012

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PDF Link: ST 74V1T77 handbook PDF