TEXAS INSTRUMENTS CDCV850 CDCV850I handbook

Update: 28 September, 2023

The document describes a phase-locked loop clock driver for double data-rate synchronous DRAM applications. It features spread spectrum clock compatibility, operating frequency range of 60 to 140 MHz, low jitter, and the capability to distribute one differential clock input to ten differential outputs. It also includes a two-line serial interface, high-impedance state, and low quiescent current consumption.

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File format: PDF

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MD5 Checksum: 0200674DF399DB256867E50B8AABA2AF

Publication date: 01 August, 2012

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PDF Link: TEXAS INSTRUMENTS CDCV850 CDCV850I handbook PDF