TEXAS INSTRUMENTS CDC857-2 CDC857-3 2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS handbook

Update: 30 September, 2023

CDC857-2 and CDC857-3 are 2.5-/3.3-V phase-lock loop clock drivers for Double Data Rate Synchronous DRAM applications. It distributes one differential clock input to ten differential outputs. External feedback pins (FBIN, FBIN) are used to synchronize the outputs to the clock input. It operates at VCC = 2.5 V and AVCC = 3.3 V. And it is packaged in plastic 48-pin (DGG) thin shrink small-outline package (TSSOP).

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MD5 Checksum: D7E35C93668F6A42169E7DF7C6777BC7

Publication date: 01 August, 2012

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PDF Link: TEXAS INSTRUMENTS CDC857-2 CDC857-3 2.5-/3.3-V PHASE-LOCK LOOP CLOCK DRIVERS handbook PDF