Update: 28 September, 2023
The CDC392 is a 1-to-6 line clock driver with selectable polarity and 3-state outputs. It is designed for clock distribution and clock generation applications, providing low output skew. The inputs are TTL-compatible and the outputs are CMOS-compatible. Various combinations of true and complementary outputs can be obtained using the polarity control inputs. The distributed VCC and GND pins help reduce switching noise. The outputs have high drive capability (-32mA IOH, 32mA IOL). The CDC392 is built using state-of-the-art EPIC-ΙΙB BiCMOS design, which significantly reduces power dissipation. It is packaged in a plastic small-outline package.
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MD5 Checksum: 408DEDA9E8E5C886E65305162C3A6713
Publication date: 01 August, 2012
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