Update: 29 September, 2023
The CD54AC163 and CD74AC163 devices are 4-bit binary counters. These synchronous, presettable counters feature an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting spikes normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform. The counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15. Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs. The clear function is synchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low after the next low-to-high transition of CLK, regardless of
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MD5 Checksum: 85B5A52D2F6F383EAC4599621397CE15
Publication date: 02 July, 2012
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PDF Link: TEXAS INSTRUMENTS CD54AC163 CD74AC163 4-BIT SYNCHRONOUS BINARY COUNTERShandbook PDF