Update: 30 September, 2023
The NM27P512 is a 512K Processor Oriented EPROM configured as 64k x 8. It's designed to simplify microprocessor interfacing while remaining compatible with standard EPROMs. It can reduce both wait states and glue logic when the specification improvements are taken advantage of in the system design. The NM27P512 is implemented in National's advanced CMOS EPROM process to provide excellent reliability and access times as fast as 120 ns. The interface improvements address two areas to eliminate the need for additional devices to adapt the EPROM to the microprocessor and to eliminate wait states at the termination of the access cycle. Even with these improvements, the NM27P512 remains compatible with industry standard JEDEC pinout EPROMs. The maximum specification for output turn-off time has been reduced, eliminating the need for wait states at the end of a read cycle. Also, the minimum specification for output hold time has been increased, eliminating the need for external circuitry to hold the data.
File format: PDF
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MD5 Checksum: 9411931CF74EF25B2F3CA317DB09DA23
Publication date: 11 June, 2012
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PDF Link: National Semiconductor NM27P512 524 288-Bit (64K x 8) Processor Oriented CMOS EPROM handbook PDF