Update: 29 September, 2023
The MC88915T Clock Driver utilizes phase-locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for high-performance PCs and workstations. The PLL allows the high current, low skew outputs to lock onto a single clock input and distribute it with essentially zero delay to multiple components on a board. The PLL also allows the MC88915T to multiply a low-frequency input clock and distribute it locally at a higher (2X) system frequency. Multiple 88915s can lock onto a single reference clock, which is ideal for applications when a central system clock must be distributed synchronously to multiple boards.
File format: PDF
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MD5 Checksum: 6912D545A4122A3306B82437A3ECA36C
Publication date: 07 June, 2012
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PDF Link: MOTOROLA MC88915TFN55/70/100/133/160 Data Sheet PDF