FAIRCHILD NM93CS56 Data Sheet

Update: 29 September, 2023

NM93CS56 is a 2048-bit CMOS non-volatile EEPROM organized as a 128 x 16-bit array. It features a MICROWIRE interface, which is a 4-wire serial bus with chipselect (CS), clock (SK), data input (DI), and data output (DO) signals. The interface is compatible with many standard microcontrollers and microprocessors. NM93CS56 offers programmable write protection to the memory array using a special register called Protect Register. Selected memory locations can be protected against write by programming this Protect Register with the address of the first memory location to be protected. Additionally, this address can be permanently locked into the device, preventing any future attempts to change data. The device also supports sequential read, allowing the entire memory to be read in one cycle instead of multiple single byte read cycles. There are 10 instructions implemented on the NM93CS56, 5 for memory operations and 5 for Protect Register operations. This device is fabricated using Fairchild Semiconductor floating-gate CMOS technology.


File format: PDF

Size: -

MD5 Checksum: 7BC39C23AE044EBC0E5DF37D8A6107F7

Publication date: 05 June, 2012

Downloads: -

PDF Link: FAIRCHILD NM93CS56 Data Sheet PDF

Also Manuals