Update: 28 September, 2023
The NM27P040 is a 4096K Processor Oriented EPROM (POPTM) configured as 512K x 8. It is designed to simplify microprocessor interfacing while remaining compatible with standard EPROMs. It can reduce both wait states and glue logic when the specification improvements are taken advantage of in the system design. The NM27P040 is implemented in National’s advanced CMOS EPROM process to provide a reliable solution and access times as fast as 120 ns. The interface improvements address two areas to eliminate the need for additional devices to adapt the EPROM to the microprocessor and to eliminate wait states at the termination of the access cycle. Even with these improvements, the NM27P040 remains compatible with industry standard JEDEC pinout EPROMs. The time from CE or OE being negated until the outputs are guaranteed to be in the high impedance state has been reduced to eliminate the need for wait states at the termination of the memory cycle and the data-out hold time has been extended to eliminate the need to provide data hold time for the microprocessor by delaying control signals or latching and holding the data in external latches.
File format: PDF
Size: -
MD5 Checksum: 3978AA33EE313627079DEB6BE6A79402
Publication date: 01 June, 2012
Downloads: -
PDF Link: National Semiconductor NM27P040 handbook PDF