Update: 28 September, 2023
The LTC4309 is a hot-swappable 2-wire bus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses. It provides bidirectional buffering, keeping the backplane and card capacitances isolated. Low offset and high VOL tolerance allow cascading of multiple devices on the clock and data buses. If SDAOUT or SCLOUT are low for 30ms, FAULT will pull low indicating a stuck bus low condition. If DISCEN is tied high, the LTC4309 will automatically break the bus connection and generate up to 16 clock pulses and a stop bit in an attempt to free the bus. A connection will resume if the stuck bus is cleared. If DISCEN is connected to GND, the buses will remain connected with no clock or stop bit generation. ACC input enables rise-time accelerators for high capacitively loaded buses. During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. When driven high, the ENABLE input allows the LTC4309 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. READY is an open drain output which indicates that the backplane and card sides are connected.
File format: PDF
Size: -
MD5 Checksum: 04E668577D52E19B842C293AC781AE19
Publication date: 10 May, 2012
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PDF Link: LINEAR TECHNOLOGY - LTC4309 handbook PDF