Update: 28 September, 2023
The LTC4307 is a low offset hot swappable 2-wire bus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock busses. It provides bidirectional buffering, keeping the backplane and card capacitances isolated. The LTC4307 has low offset and high VOL tolerance, allowing multiple devices to be cascaded on the clock and data busses. If SDAOUT or SCLOUT are low for 30ms, the LTC4307 will automatically break the bus connection and generate clock pulses to attempt to free the bus. The connection will resume if the stuck bus is cleared. During insertion, the SDA and SCL lines are pre-charged to 1V to minimize bus disturbances. The ENABLE input allows the LTC4307 to connect after a stop bit or bus idle. Driving ENABLE low breaks the connection between SDAIN and SDAOUT, SCLIN and SCLOUT. The READY output indicates that the backplane and card sides are connected.
File format: PDF
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MD5 Checksum: 148A73BC6BE554D6D8D9C8A951D6BE75
Publication date: 10 May, 2012
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PDF Link: LINEAR TECHNOLOGY LTC4307 handbook PDF