Update: 28 September, 2023
ADCLK846 is a low power clock fanout buffer with selectable LVDS/CMOS outputs. It can provide up to 6 LVDS (1.2 GHz) or 12 CMOS (250 MHz) outputs. Each channel consumes less than 16 mW power and has an integrated jitter of 54 fs (12 kHz to 20 MHz) and additive broadband jitter of 100 fs. It has a propagation delay of 2.0 ns (LVDS), output rise/fall time of 135 ps (LVDS), and output-to-output skew of 65 ps (LVDS). This product is suitable for applications such as low jitter clock distribution, clock and data signal restoration, level translation, wireless communications, wired communications, medical and industrial imaging, ATE, and high performance instrumentation.
File format: PDF
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MD5 Checksum: 04F1710E49050FDCB4C3023D5CFA4905
Publication date: 03 May, 2012
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PDF Link: ANALOG DEVICES ADCLK846 English products handbook PDF