Update: 01 October, 2023
AD9520-5 is an AD company's clock generator product. It supports external 3.3V/5V VCO/VCXO to 2.4GHz, supports 1 differential or 2 single-ended reference inputs, supports CMOS, LVDS or LVPECL references to 250MHz, supports 16.67MHz to 33.3MHz crystal reference input, supports optional reference clock doubler, supports reference monitoring function, supports automatic and manual reference switching/holdover mode, supports selectable reverse/non-reverse switching, supports glitch-free reference switching, supports automatic recovery from holdover mode, supports digital or analog lock detection, supports optional zero delay operation, supports 12 1.6GHz LVPECL outputs, each output can be divided into 4 groups, each group of 3 outputs has a 1-to-32 divider with phase delay, output jitter is as low as 225fs rms, the channel-to-channel skew of grouped outputs is less than 16ps, each LVPECL output can be programmed as CMOS or LVPECL output.
File format: PDF
Size: -
MD5 Checksum: ABA33E98B06FE7F51F9E3209F48199E5
Publication date: 03 May, 2012
Downloads: -
PDF Link: ANALOG DEVICES AD9520-5 handbook (1) PDF