ANALOG DEVICES AD9520-1 English products handbook

Update: 29 September, 2023

This document describes a 12 LVPECL/24 CMOS output clock generator with an integrated 2.5 GHz VCO. It supports external 3.3V/5V VCO/VCXO up to 2.4 GHz. The clock generator features a low phase noise phase-locked loop (PLL), accepts CMOS, LVDS, or LVPECL reference signals up to 250 MHz, supports automatic and manual reference switchover/holdover modes, and has 12 1.6 GHz LVPECL outputs with low additive output jitter.

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MD5 Checksum: 6E3D8878C59EC6A2B158D7D6B15961DF

Publication date: 03 May, 2012

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PDF Link: ANALOG DEVICES AD9520-1 English products handbook PDF