Update: 01 October, 2023
The K4S281632M is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programma- ble burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high perfor- mance memory system applications.
File format: PDF
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MD5 Checksum: B6702F8B408F030A9AD4ADDC68A19491
Publication date: 01 April, 2012
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PDF Link: Samsung 128Mbit SDRAM 2M x 16Bit x 4 Banks Synchronous DRAM LVTTL Data Sheet(1) PDF