SAMSUNG K4S280432A datasheet
Update: 30 September, 2023
The K4S280432A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits, fabricated with SAMSUNG′s high performance CMOS technol- ogy. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance mem- ory system applications.
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MD5 Checksum: 294CC4FA97A70FD3AF174FBB2653A6CA
Publication date: 01 April, 2012
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SAMSUNG K4S280432A datasheet PDF