Update: 01 October, 2023
ISL6752 is a high performance, low pin count zero voltage (ZVS) full bridge pulse width (PWM) controller. This controller can realize ZVS operation by starting at a fixed 50% duty cycle of the upper switch and adjusting the pulse width at the trailing edge of the lower switch. The ISL6752 has complementary PWM outputs for synchronous rectification control. With external control voltage, these complementary outputs can be dynamically advanced or delayed. This advanced BiCMOS design not only supports precise dead time control and resonant delay control, but also has an adjustable oscillator with a frequency up to 2MHz. In addition, when a jump pulse may occur, multi-phase pulse suppression can ensure corresponding output pulses at a low duty cycle.
File format: PDF
Size: -
MD5 Checksum: AC4B9B43896992B73B9C24B8DE89AF68
Publication date: 28 March, 2012
Downloads: -
PDF Link: intersil ISL6752 Manual PDF