Key facts
- Manuals
- 7
- Languages
- ZH
- Last added
- 2012-01-11
Featured Hangzhou立泰电子 manuals
Hangzhou Litai Electronics S3C44B0X Datasheet
The document provides an overview of the S3C44B0X internal memory controller, describing its address space of 32 MB per bank (total 236 MB across 8 banks) and the ability to select little‑ or big‑endian mode via the ENDIAN pin. It also explains that each bank’s bus width is programmable to 8, 16 or 32 bits using the OM[1:0] pins.
Detailed register definitions are given for BWSCON, BANKCON, REFRESH and BANKSIZE, including bit fields for bus width, wait states, page mode, and DRAM refresh control. The register tables show how to configure memory types (ROM, SRAM, FP‑DRAM, EDO‑DRAM, Sync‑DRAM) and timing parameters such as Tacs, Tcos, Tacc, and others. This manual is written in Chinese.
Covers: Memory Controller Overview · Register Definitions · Bank Configuration (BANKCON) · Refresh Control (REFRESH) · Bank Size Settings (BANKSIZE)
Hangzhou Litai Electronics S3C44B0X Data Manual
The S3C44B0X data manual describes the processor's internal architecture, including an 8 KB cache, internal SRAM, and a processor wrapper that manages cache, write buffer and bus arbitration. It explains how the cache can be configured, disabled, refreshed, and how non‑cache regions are defined for DMA and other operations.
The document also details the bus priority scheme for the seven bus masters (LCD_DMA, BDMA0/1, ZDMA0/1, nBREQ, and CPU wrapper) and lists the special registers (SYSCFG, NCACHBE0/1, SBUSCON) used to control cache mode, write buffer, and priority settings. This manual is written in Chinese.
Covers: Processor Wrapper and Bus Priority · Cache Organization · Cache Replacement Operations · Cache Disable and Refresh · Non‑Cache Areas · Improving Program Execution Speed
Hangzhou Litai Electronics S3C44B0X User Manual
This manual describes the S3C44B0X microcontroller, a 16/32‑bit ARM7TDMI RISC device featuring an 8 KB cache, integrated SRAM, LCD controller, multiple UARTs, DMA channels, PWM timers, ADCs, and a PLL that can reach up to 75 MHz. It highlights the chip’s low‑power modes, on‑chip peripherals, and flexible memory architecture.
The document includes detailed pin‑out diagrams, descriptions of the clock and reset circuitry, interrupt controller, DMA, UART, I²C, IIS, SIO, ADC, timer/PWM, LCD controller, power supply requirements, and package options (160‑LQFP/160‑FBGA). It also provides electrical characteristics and configuration registers for system designers. This manual is written in Chinese.
Covers: 概述 · 特性 · 内部结构 · 引脚分布 · 时钟与复位 · 中断控制
Hangzhou Litai Electronics S3C44B0X Datasheet
The S3C44B0X datasheet provides a detailed description of the chip’s internal timer architecture, including six 16‑bit timers, prescalers, dividers, PWM capabilities, dead‑zone generator and register maps. It explains how each timer can operate in interrupt or DMA mode and shows the configuration registers (TCFG0, TCFG1, TCON) needed for various functions.
The document also includes timing calculations, example PWM waveforms, and instructions for using manual update, auto‑reload, output inversion and dead‑zone features. All information is presented in Chinese with tables and diagrams for developers integrating the S3C44B0X into their designs. This manual is written in Chinese.
Covers: Overview · PWM Timer Operation · Prescaler and Divider · Basic Timer Operation · Auto‑reload and Double Buffer · Manual Update and Inverter Initialization
Latest Hangzhou立泰电子 manuals
Hangzhou Litai Electronics S3C44B0X Datasheet
Datasheet 5 pages · 361 KB · ZHChinese datasheet for the S3C44B0X microcontroller covering memory controller features, register definitions and bus configuration.
HANGZHOU LITAI Electronics S3C44B0X chinese handbook(5)
Hangzhou Litai Electronics S3C44B0X Data Manual
Datasheet 7 pages · 391 KB · ZHTechnical data manual for the Hangzhou Litai Electronics S3C44B0X processor covering cache, SRAM, bus arbitration and registers.
Hangzhou Litai Electronics S3C44B0X User Manual
User Manual 10 pages · 435 KB · ZHThe Hangzhou Litai Electronics S3C44B0X user manual provides an overview, features, pinout, and specifications of the ARM7TDMI‑based microcontroller.
Hangzhou Litai Electronics S3C44B0X Datasheet
Datasheet 10 pages · 827 KB · ZHChinese datasheet for the S3C44B0X microcontroller detailing its timers, PWM features, and register settings.
Hangzhou Litai Electronics S3C44B0X Datasheet
Datasheet 10 pages · 827 KB · ZHChinese datasheet that details the S3C44B0X microcontroller’s timers, PWM features, registers and dead‑zone generator.
HANGZHOU LITAI Electronics S3C44B0X chinese handbook(3)
Which document do I need?
Datasheet
Ratings, dimensions and ordering codes, for selection and design work.
User Manual
Day-to-day operation, settings and troubleshooting. Start here if the product is already set up.
Questions answered in Hangzhou立泰电子 manuals
How many memory banks does the S3C44B0X have?
The S3C44B0X provides eight memory banks.
How is endianness selected on the S3C44B0X?
Endianness is selected with the ENDIAN pin: a low level selects little‑endian and a high level selects big‑endian.
How many cache sets does the S3C44B0X have?
The processor provides four cache sets, labeled set0 through set3.
What is the size of the internal SRAM?
The internal SRAM is at least 8 KB in size.
What processor core does the S3C44B0X use?
It uses an ARM7TDMI core running up to 66 MHz.
How many ADC channels are available?
The device provides eight 10‑bit ADC channels.