NXP manuals, page 17
NXP 74LVC_LVCH16373A transparent latch
The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches featuring separate D-type inputs with bus hold (74LVCH16373A only) for each latch and 3-state outputs for bus-oriented applications. One Latch Enable (LE) input and one Output Enable (OE) are provided for each octal. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.
NXP 74LV165 Counter
The 74LV165 is an 8-bit parallel-load or serial-in shift register with complementary serial outputs (Q7 and Q7) available from the last stage.
NXP ACTT4X-800C Thyristor
Planar passivated AC Thyristor Triac power switch in a SOT186A (TO-220F) "full pack" plastic package with self-protective capabilities against low and high energy transients.
NXP ACTT4S-800C Thyristor
Planar passivated AC Thyristor Triac power switch in a SOT428 (DPAK) surface mountable plastic package with self-protective clamping capabilities against low and high energy transients.
NXP 74LVT245 transceiver
The 74LVT245 is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The control function implementation minimizes external timing requirements. It features an output enable (OE) input for easy cascading and a direction (DIR) input for direction control.
NXP ACTT2X-800E Thyristor
Planar passivated AC Thyristor Triac power switch in a SOT186A (TO-220F) "full pack" plastic package with self-protective capabilities against low and high energy transients.
NXP 74LVC_LVCH16244A buffer
The 74LVC16244A; 74LVCH16244A are 16-bit non-inverting buffer/line drivers with 3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state.
NXP ACTT4S-800E Thyristor
Planar passivated AC Thyristor Triac power switch in a SOT428 (DPAK) surface mountable plastic package with self-protective clamping capabilities against low and high energy transients.
NXP ACTT2S-800E Thyristor
AC Thyristor Triac power switch in a SOT428 (DPAK) surface mountable plastic package with self-protective clamping capabilities against low and high energy transients.
NXP 74LV244 buffer
The 74LV244 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC244 and 74HCT244. The 74LV244 is an octal non-inverting buffer/line driver with 3-state outputs. The output enable inputs 1OE and 2OE control the 3-state outputs. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74LV244 is identical to the 74LV240 but has non-inverting outputs.
NXP 74HC_HCT4017 Counter
The 74HC4017; 74HCT4017 is a 5-stage Johnson decade counter with 10 decoded outputs (Q0 to Q9), an output from the most significant flip-flop (Q5-9), two clock inputs (CP0 and CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a LOW-to-HIGH transition at CP0 while CP1 is LOW or a HIGH-to-LOW transition at CP1 while CP0 is HIGH. When cascading counters, the Q5-9 output, which is LOW while the counter is in states 5, 6, 7, 8 and 9, can be used to dr
NXP 74HC_HCT153 multiplexer
The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY). A HIGH on E forces the corresponding multiplexer outputs LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
NXP 74HC_HCT377 flip-flop
The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interfa
NXP 74HC_HCT3G06 inverter
The 74HC3G06; 74HCT3G06 is a triple inverter with open-drain outputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
NXP 74HC_HCT7541 buffer
The 74HC7541; 74HCT7541 is an 8-bit buffer/line driver with Schmitt-trigger inputs and 3-state outputs. The device features two output enables (OE1 and OE2). A HIGH on OEn causes the outputs to assume a high-impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly changing input signals into sharply defined jitter-free output signals.