TEXAS Manuals

This is a user guide for the MSP430F6638 sample kit, published by Texas Instruments.

This document provides key specifications and features of operational amplifiers and current monitors in the System Monitoring and Protection Solutions Guide for 4Q 2007.

Texas Instruments provides Interface IC solutions ranging from CAN, LVDS, RS-485, RS-232 industry standards to 1394 (Firewire), USB, PCI Cardbus and more. Our Interface Selection Tool is available to help you understand what Interface IC best suits your connectivity needs.

2006 Mixed Signal Products User’s Guide

This document mentions that TI's TUSB2046B, TUSB2077A and TUSB2036 chips have a small problem in determining the intended speed of an attached downstream device. According to the USB specification, the speed should be determined by sampling the DP or DM line following a 100ms debounce interval after either signal (DP or DM) first crosses the VIH threshold. The TUSB2046B (TUSB2077A, TUSB2036) actually samples the speed at the first VIH crossing and latches this value. This issue has only been observed recently with newer devices that either drive DM high or show excessive ringing during the initial connection, hence causing the speed detection to be seen as low speed by the TUSB2046B (TUSB2077A, TUSB2036).

This document describes a bug in TI TUSB2036, TUSB2046B and TUSB2077A in detecting the speed of connected devices. The bug may cause the devices to be recognized as low speed devices.

This document is the user guide for the eZ430-RF2500 development tool. It provides an overview of the development tool, kit contents, development methods, specifications, supported devices, UART application, software installation, hardware installation, SimpliciTI network protocol, demo projects, suggested reading, frequently asked questions, schematics, and detailed hardware installation guide.

The TMS320LF240xA/LC240xA DSP controllers provide 40-MIPS performance with a 25-ns instruction cycle time (40 MHz). They feature a low-power 3.3-V design based on the TMS320C2xx DSP CPU core. These devices are available in LF and LC packages. The LF package provides erasable flash, while the LC package provides programmable ROM. All devices provide a programmable code-security feature.

This document describes the features and characteristics of DSP controllers including TMS320LF2407A, TMS320LF2406A, TMS320LF2403A, TMS320LF2402A, TMS320LC2406A, TMS320LC2404A, TMS320LC2403A, TMS320LC2402A. These products are based on the TMS320C2xx DSP CPU core and feature high-performance static CMOS technology, 25-ns instruction cycle time (40 MHz), 40 MIPS performance, and low-power 3.3V design. They offer options for Flash (LF) and ROM (LC) devices, and include various on-chip memory such as Flash EEPROM or ROM, data/program RAM, and dual-access RAM. Additionally, they support SCI/SPI bootloader and multiple event-manager (EV) modules, which include 16-bit general-purpose timers, 16-bit pulse-width modulation (PWM) channels, input qualifier, etc.

This document describes the features and characteristics of products such as TMS320LF2407, TMS320LF2406, and TMS320LF2402, including high-performance static CMOS technology, low-power design, TMS320C2xx DSP CPU core, and on-chip memory.

This document details the features of TMS320LF2407, TMS320LF2406, TMS320LF2402 TMS320LC2406, TMS320LC2404, TMS320LC2402 DSP CONTROLLERS, including high-performance static CMOS technology, 33-ns instruction cycle time, 30 MIPS performance, low-power 3.3-V design, based on T320C2xx DSP CPU core, code compatible ’F243/’F241/’C242, instruction set and module compatible ’F240/’C240, source code compatible TMS320C1x/2x, Flash (LF) and ROM (LC) device options, on-chip memory, boot ROM (’LF240x devices), SCI/SPI flash bootloader, two event manager (EV) modules (A and B) EVA and EVB each include two 16-bit general-purpose timers, eight 16-bit pulse-width modulation (PWM) channels, three capture units, on-chip position encoder interface circuitry, synchronous analog-to-digital conversion, suitable for AC induction, BLDC, switched reluctance and stepper motor control, application for motor control, automotive applications, digital control, instrumentation and instruments, power management, telecommunications, industrial control and other fields.

This document describes the features and characteristics of DSP controllers TMS320LF2407, TMS320LF2406, TMS320LF2402, TMS320LC2406, TMS320LC2404, and TMS320LC2402. It includes 33-ns instruction cycle time, 30 MIPS performance, low-power 3.3V design, based on T320C2xx DSP CPU core, flash and ROM device options, on-chip memory, boot ROM, and two event manager modules.

TMS320DM642 is a high-performance digital media processor with 1024M-Byte total addressable external memory space, 2-, 1.67-, 1.39-ns instruction cycle time, 500-, 600-, 720-MHz clock rate, eight 32-bit instructions/cycle, 4000, 4800, 5760 MIPS of processing speed.

This manual describes the features and characteristics of the TLC32047C and TLC32047I data interface circuits.