CIRRUS Manuals
CIRRUS LOGIC CS4270 Manual
This document introduces a new 24-Bit, 192 kHz Stereo Audio CODEC from Cirrus Logic company. The product has high performance, selectable serial audio interface formats, control output for external muting, digital de-emphasis, Popguard technology, multi-bit ∆Σ conversion, digital volume control and so on.
File format: PDF Size:731 KB
CIRRUS LOGIC CS44600 handbook
This document contains detailed information about the Cirrus Logic 6-Channel Digital Amplifier Controller, including its features, specifications, and performance.
File format: PDF Size:745 KB
CIRRUS LOGIC CS4271 24-Bit 192 kHz Stereo Audio CODEC handbook
This document introduces CS4271 24-Bit, 192 kHz Stereo Audio CODEC. The chip has high performance, high sampling rate, differential analog architecture, soft start volume control, optional digital filters, ATAPI mixing functions, optional serial audio interface formats, control output for external muting, optional 50/15μs de-emphasis etc.
File format: PDF Size:1200 KB
CIRRUS LOGIC CS8421 handbook
This document contains information for a new product, including its features and characteristics.
File format: PDF Size:526 KB
CIRRUS LOGIC EP9312 Data Sheet Universal Platform System-on-chip Processor
This datasheet introduces the features of Cirrus Logic EP9312 chip
File format: PDF Size:885 KB
CIRRUS LOGIC CS4360 Data Sheet
The document is about Cirrus Logic CS4360 24-Bit, 192 kHz 6-channel D/A Converter. It contains the product's features and characteristics.
File format: PDF Size:846 KB
CIRRUS LOGIC -CS5521/22/23/24/28 handbook
This document describes the CS5521/22/23/24/28 series ADCs from Cirrus Logic, released in 2005. These ADCs are 16-bit or 24-bit, 2/4/8-channel devices with features such as low input current, scalable input span, and fourth-order Delta-Sigma A/D converter.
File format: PDF Size:794 KB
CIRRUS LOGIC -CS4398 handbook
This document introduces Cirrus Logic 120 dB, 192 kHz multi-bit DAC with volume control features.
File format: PDF Size:767 KB
CIRRUS LOGIC CS4351 handbook
This document is an introduction to Cirrus Logic CS4351, a 192 kHz stereo DAC with 2 Vrms line out
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CIRRUS LOGIC CS4397 handbook
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CIRRUS LOGIC CS4344/5/6/8 DATA SHEET
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CIRRUS LOGICCS42526 114 dB 192 kHz 6-Ch Codec with S/PDIF Receiver Manual
This document introduces the features and characteristics of CS42526 114 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver.
File format: PDF Size:1561 KB
CIRRUS LOGIC CS42516 handbook
This document provides information for Cirrus Logic CS42516 110 dB, 192 kHz 6-Ch Codec with S/PDIF Receiver.
File format: PDF Size:1560 KB
CIRRUS LOGIC CS42528 114 dB 192 kHz 8-Ch Codec with S/PDIF Receiver Manual
This document introduces the features and characteristics of CS42528 114 dB, 192 kHz 8-Ch Codec with S/PDIF Receiver
File format: PDF Size:1542 KB
CIRRUS LOGIC -CS2100-CP Fractional-N Clock Multiplier handbook
This document provides information about the Cirrus Logic CS2100-CP product, including features, specifications, and applications.
File format: PDF Size:391 KB
CIRRUS LOGIC - CS2200-CP Fractional-N Frequency Synthesizerhandbook
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CIRRUS LOGIC - CS7401xx Energy Measurement SoC handbook
The CS7401xx energy measurement system-on-chip (SoC) reduces the cost to implement advanced digital power meters for electrical utilities and enables many other energy conservation applications. It features 24-bit Delta-Sigma ADCs and on-chip metrology code, providing the highest quality power measurement. The 32-bit processor and targeted peripherals can implement metrology, advanced data management standards, and communication protocols all in the same device. The extensive software library enables quick and easy program development.
File format: PDF Size:526 KB
CIRRUS LOGIC CS2300-CP Manual
CS2300-CP is a Fractional-N Clock Multiplier with Internal LCO from Cirrus Logic. It supports I²C and SPI control, and can generate a low jitter clock in the frequency range of 50Hz to 30MHz.
File format: PDF Size:371 KB
CIRRUS LOGIC CS2200-OTP Manual
The CS2200-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2200-OTP is based on an analog PLL architecture comprised of a Delta-Sigma Fractional-N Frequency Synthesizer. This architecture allows for frequency synthesis and clock generation from a stable reference clock. The CS2200-OTP has many configuration options which are set once prior to runtime. At runtime there are three hardware configuration pins available for mode and feature selection.
File format: PDF Size:180 KB
CIRRUS operating instructions
This document is the user manual of Peavey Cirrus™ bass guitar
File format: PDF Size:3017 KB