SLS Manuals

The SL34118 Voice Switched Speakerphone Circuit incorporates the necessary amplifiers, attenuators, level detectors, and control algorithm to form the heart of a high quality hands-free speakerphone system.

The SL74HC374 is a high-performance silicon-gate CMOS octal 3-state noninverting D flip-flop. It has the same pinout as the LS/ALS374. The device inputs are compatible with standard CMOS outputs, and with pull-up resistors, they are compatible with LS/ALSTTL outputs. Data meeting the setup and hold time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does not affect the states of the flip-flops, but when Output Enable is high, the outputs are forced to the high-impedance state; thus, data may be stored even when the outputs are not enabled.

The SL74HC367 is a high-performance hex 3-state noninverting buffer with separate 2-bit and 4-bit sections. It has outputs that directly interface to CMOS, NMOS, and TTL, with an operating voltage range of 2.0 to 6.0V. It has low input current and high noise immunity characteristic of CMOS devices.

The SL74HC393 is a dual 4-bit binary ripple counter with parallel outputs from each counter stage. Its outputs directly interface to CMOS, NMOS, and TTL, with an operating voltage range of 2.0 to 6.0V and a low input current of 1.0µA. It also has the high noise immunity characteristic of CMOS devices.

The SL74HCT132 is a high-performance silicon gate CMOS chip with four 2-input NAND gates and Schmitt-trigger inputs. It can be used as a level converter for interfacing TTL or NMOS outputs to high-speed CMOS inputs.

The SL74HC4015 is a high-performance silicon-gate CMOS dual 4-bit shift register. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device consists of two identical independent 4-stage serial-input/parallel-output registers. Each register has independent Clock and Reset inputs as well as a single serial Data input. “Q” outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the Data input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line.

The SL74HCT240 is a high-performance octal 3-state inverting buffer/line driver/line receiver that can be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. It features inverting outputs and two active-low output enables.

The SL4012B is a high-voltage silicon-gate CMOS dual 4-input NAND gate produced by System Logic Semiconductor SLS. The operating voltage range is 3.0 to 18 V, the maximum input current is 1 µA, and the noise margin is 1.0 V min @ 5.0 V, 2.0 V min @ 10.0 V, and 2.5 V min @ 15.0 V.

The SL74HC4052 is a high-performance silicon-gate CMOS analog multiplexer/demultiplexer from System Logic Semiconductor SLS. It achieves fast propagation delays, low ON resistances, and low OFF leakage currents. This product controls analog voltages that may vary across the complete power supply range (from VCC to VEE). The Channel-Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. When the Enable pin is high, all analog switches are turned off. The Channel-Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALS TTLoutputs.

SL74HC4053 is a high-performance silicon-gate CMOS analog multiplexer/demultiplexer produced by System Logic Semiconductor SLS. It features fast propagation delays, low on-resistances, and low off-leakage currents. The analog multiplexers/demultiplexers control analog voltages that may vary across the complete power supply range (from VCC to VEE). The Channel-Select inputs determine which one of the Analog Inputs/Outputs is to be connected, by means of an analog switch, to the Common Output/Input. When the Enable pin is high, all analog switches are turned off. The Channel-Select and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.