ST Manuals

M74HC373 is a high-performance CMOS eight-bit D-type latch with 3-state outputs. It works with a voltage range of 2V to 6V, and the output current IOH and IOL is 6mA, and the input voltage VNIH and VNIL is 28% VCC.

The M74HC367 is a high-speed CMOS HEX BUS BUFFER with 3-state outputs fabricated with silicon gate C2MOS technology. This device contains six buffers, four buffers are controlled by an enable input (G1) and the other two buffers are controlled by the other enable input (G2); the outputs of each buffer group are enabled when G1 and/or G2 inputs are held low, and when held high, these outputs are disabled in a high-impedance state. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

The 74HC365 is an advanced high-speed CMOS HEX BUS BUFFER (3-STATE) fabricated with silicon gate C2MOS technology. All six buffers are controlled by the combination of two enable inputs (G1 and G2); all outputs of these buffers are enabled only when both G1 and G2 inputs are held low, under all other conditions these outputs are disabled in a high-impedance state. The M74HC365 has non inverting outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

The M74HC32 is a high-speed CMOS quad 2-input OR gate fabricated with silicon gate C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

The M74HC299 is an high speed CMOS 8 BIT PIPO SHIFT REGISTER (3-STATE) fabricated with silicon gate C2MOS technology. This device has four modes (HOLD, SHIFT LEFT, SHIFT RIGHT and LOAD DATA). Each mode is chosen by two function select inputs (S0, S1). When one or both enable inputs, (G1, G2) are high, the eight input/output terminals are in the high impedance state; however sequential operation or clearing of the register is not affected. Clear function on the M74HC299 is asynchronous to CLOCK. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

M74HC283 is a 4-bit binary full adder with full internal look-ahead. A 4 x n binary adder is easily built up by cascading without any additional logic.

M74HC280 9-BIT PARITY GENERATOR is a high speed CMOS 9-BIT PARITY GENERATOR fabricated with silicon gate C2MOS technology.

The M74HC273 is a high speed CMOS OCTAL D TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. Information signals applied to D inputs are transferred to the Q outputs on the positive-going edge of the clock pulse. When the CLEAR input is held low, the Q output are in the low logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

The M74HC27 is a high speed CMOS triple 3-input NOR gate fabricated with silicon gate C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

The M74HC266 is a high performance CMOS quad exclusive gate with open drain output. Input and output ensure high noise immunity and stable outputs. All inputs are equipped with protection circuits against static discharge and transient excess voltage.

M74HC259 is an M74HC series of 8-bit addressable latch, fabricated with silicon gate C2MOS technology, working voltage range is 2V to 6V, with high speed, low power consumption, high noise immunity, symmetrical output impedance, balanced propagation delay

The document introduces a high-speed CMOS quad 2-channel multiplexer with features such as high speed, low power dissipation, high noise immunity, symmetrical output impedance, balanced propagation delays, and wide operating voltage range.

The M74HC245 is an advanced high-speed CMOS octal bus transceiver (3-state) fabricated with silicon gate C2MOS technology. This IC is intended for two-way asynchronous communication between data buses, and the direction of data transmission is determined by the DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. All inputs are equipped with protection circuits against static discharge and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW.

M74HC240 is an 8-channel buffer with high speed, low power consumption, high anti-interference, symmetrical output impedance, balanced propagation delay and wide operating voltage range.