For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
All typical values are at VCC = 5V, Tamb = 25
The 74LVT245 is a high-performance BiCMOS product designed for VCC operation at
3.3 V.
This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs
in both send and receive directions. The control function implementation minimizes
external timing requirements. It features an output enable (OE) input for easy cascading
and a direction (DIR) input for direction control.
The 74ALVCH16600 is an 18-bit universal transceiver featuring
non-inverting 3-State bus compatible outputs in both send and
receive directions. Data flow in each direction is controlled by output
enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock
(CPAB and CPBA) inputs. For A-to-B data flow, the device operates
in the transparent mode when LEAB is High. When LEAB is Low, the
A data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stor
The 74ABT640 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT640 device is an octal transceiver featuring inverting
3-State bus compatible outputs in both send and receive directions.
The control function implementation minimizes external timing
requirements. The device features an Output Enable (OE) input for
easy cascading and a Direction (DIR) input for direction control.
The 74HC2G86; 74HCT2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs include
clamp diodes that enable the use of current limiting resistors to interface inputs to voltages
in excess of VCC.
The 74ALVCH16500 is a high-performance CMOS product.
This device is an 18-bit universal transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
Data flow in each direction is controlled by output enable (OEAB and
OEBA), latch enable (LEAB and LEBA), and clock (CPAB and CPBA)
inputs. For A-to-B data flow, the device operates in the transparent
mode when LEAB is High. When LEAB is Low, the A data is latched if
CPAB is held at a High or Low log
The 74ALVCH16601 is an 18-bit universal transceiver featuring
non-inverting 3-State bus compatible outputs in both send and
receive directions. Data flow in each direction is controlled by output
enable (OEAB and OEBA), latch enable (LEAB and LEBA), and clock
(CPAB and CPBA) inputs. For A-to-B data flow, the device operates
in the transparent mode when LEAB is High. When LEAB is Low, the
A data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stor
The 74ALVCH16646 consists of 16 non-inverting bus transceiver
circuits with 3-State outputs, D-type flip-flops and control circuitry
arranged for multiplexed transmission of data directly from the
internal registers. Data on the
The 74ALVCH162245 is a 16-bit transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
The 74ALVCH162245 features two output enable (nOE) inputs for
easy cascading and two send/receive (nDIR) inputs for direction
control. nOE controls the outputs so that the buses are effectively
isolated. This device can be used as two 8-bit transceivers or one
16-bit transceiver.
The LVT640 is a high-performance BiCMOS product designed for
VCC operation at 3.3V.
This device is an octal transceiver featuring inverting 3-State bus
compatible outputs in both send and receive directions. The control
function implementation minimizes external timing requirements.
The device features an Output Enable (OE) input for easy cascading
and a Direction (DIR) input for direction control.
The 74ALVT16652 is a high-performance BiCMOS product
designed for VCC operation at 2.5V or 3.3V with I/O compatibility up
to 5V. The device can be used as two 8-bit transceivers or one
16-bit transceiver.
The LVT652 is a high-performance BiCMOS product designed for
VCC operation at 3.3V.
This device combines low static and dynamic power dissipation with
high speed and high output drive.
The 74LVT652 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D
The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches featuring
separate D-type inputs with bus hold (74LVCH16373A only) for each latch and 3-state
outputs for bus-oriented applications. One Latch Enable (LE) input and one Output Enable
(OE) are provided for each octal. Inputs can be driven from either 3.3 V or 5 V devices.
When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of
these devices in mixed 3.3 V and 5 V applications.
The LVT640 is a high-performance BiCMOS product designed for
VCC operation at 3.3V.
This device is an octal transceiver featuring inverting 3-State bus
compatible outputs in both send and receive directions. The control
function implementation minimizes external timing requirements.
The device features an Output Enable (OE) input for easy cascading
and a Direction (DIR) input for direction control.
