IDT IDT23S09 handbook

Update: 28 September, 2023

The IDT23S09 is a high-speed phase-lock loop (PLL) clock buffer designed for high-speed clock distribution applications. It achieves zero delay and operates within the range of 10 to 133MHz. The IDT23S09 accepts one reference input and drives two banks of four low skew clocks. The -1H version of this device has higher drive capability at 133MHz frequency.

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Brand: IDT

File format: PDF

Size: 55 KB

MD5 Checksum: 0B60ED2CB840D758E496DFC51033EFB1

Publication date: 15 June, 2012

Downloads: -

PDF Link: IDT IDT23S09 handbook PDF