PMC Manuals

PMC-941030 (R7) is a monolithic single-chip device that integrates four full-featured T1 framers and transmitters for terminating duplex DS1 signals. It supports SF, ESF, T1DM (DDS), and SLC®96 format DS1 signals. It supports unframed mode and B8ZS or AMI line codes. It supports transfer of PCM and signalling data to/from 1.544 Mbit/s, 2.048 Mbit/s, 12.352 Mbit/s, or 16.384 Mbit/s backplane buses. It supports n x DS0 backplane interface for fractional T1. It provides robbed-bit signalling extraction/insertion, programmable idle and digital milliwatt code substitution, and two superframes of signalling debounce on a per-channel basis. It provides trunk conditioning which forces programmable trouble code substitution and signalling conditioning on all/selected channels. It provides ESF bit-oriented code detection/generation, and an HDLC interface for terminating/generating the ESF data link. It is software and functionally compatible with the PM4341A T1XC Single T1 Transceiver and pin-compatible with the PM6344 EQUAD Quad E1 Framer. It provides an 8-bit microprocessor bus interface for configuration, control, and status monitoring. It is built using low power 5 V CMOS technology and is available in a rectangular 128-pin PQFP (14 by 20 mm) package.

This is a document on the AAL1GATOR-8 reference design, which introduces the design's architecture and features

This document is the PM7383 FREEDM-32A256 datasheet released by PMC-2010336, which describes the features and characteristics of the product.

The Pm29F004 is a 4 Megabit, 5 Volt-only Flash Memory with features including single power supply operation, high performance read, memory blocks architecture, automatic block erase and byte program, hardware data protection, low power consumption, and high product endurance.

The Pm29F002 is a 2Mb 5V flash memory with features such as single power supply operation, high performance read, and cost-effective block architecture.

This document is a manual for the driver of PMC-Sierra's TEMUX/TEMAP/TECT3 (PM8315, PM5365, PM4328) devices. The document describes the functions, data structures, and architecture of the driver, as well as how to modify and port the driver to software and hardware platforms. The document also describes the differences between the devices and their respective features and characteristics.

RM7000B is a 64-bit MIPS RISC microprocessor with integrated L2 Cache from PMC-Sierra. It has a dual-issue symmetric superscalar microprocessor, a maximum CPU frequency of 500MHz, and the ability to issue two instructions per clock cycle. It also has integrated primary and secondary caches, a high-performance system interface, and other features.