MAXIM Manuals (Others)

The MAX9392/MAX9393 dual 2 x 2 crosspoint switches perform high-speed, low-power, and low-noise signal distribution. The MAX9392/MAX9393 multiplex one of two differential input pairs to either or both low-voltage differential signaling (LVDS) outputs for each channel. Independent enable inputs turn on or turn off each differential output pair. Four LVCMOS/LVTTL logic inputs (two per channel) control the internal connections between inputs and outputs. This flexibility allows for the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter, or dual repeater. This makes the MAX9392/MAX9393 ideal for protection switching in fault-tolerant systems, loopback switching for diagnostics, fanout buffering for clock/data distribution, and signal regeneration. Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the common-mode voltage exceeds the specified range. The MAX9392 provides high-level input fail-safe detection for LVDS, HSTL, and other GND-referenced differential inputs. The MAX9393 provides low-level input fail-safe detection for LVPECL, CML, and other VCC-referenced differential inputs. Ultra-low 98ps(P-P) (max) pseudorandom bit sequence (PRBS) jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 1.5 Gbps communication rate.

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The MAX9394/MAX9395 consist of a 2:1 multiplexer and a 1:2 demultiplexer with loopback. The multiplexer section (channel B) accepts two low-voltage differential signaling (LVDS) inputs and generates a single LVDS output. The demultiplexer section (channel A) accepts a single LVDS input and generates two parallel LVDS outputs. The MAX9394/MAX9395 feature a loopback mode that connects the input of channel A to the output of channel B and connects the selected input of channel B to the outputs of channel A. Three LVCMOS/LVTTL logic inputs control the internal connections between inputs and outputs, one for the multiplexer portion of channel B (BSEL), and the other two for loopback control of channels A and B (LB_SELA and LB_SELB). Independent enable inputs for each differential output pair provide additional flexibility. Fail-safe circuitry forces the outputs to a differential low condition for undriven inputs or when the common-mode voltage exceeds the specified range. The MAX9394 provides high-level input fail-safe detection for HSTL, LVDS, and other GND-referenced differential inputs. The MAX9395 provides low-level fail-safe detection for CML, LVPECL, and other VCC-referenced differential inputs. Ultra low 91psP-P (max) pseudorandom bit sequence (PRBS) jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers.

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The MAX9320B is a low-skew, 1-to-2 differential driver designed for clock and data distribution. It features ultra-low propagation delay, part-to-part skew, and output-to-output skew, making it ideal for clock distribution. The device operates over a +3.0V to +5.5V supply range for PECL/LVPECL operation, and a -3.0V to -5.5V supply range for ECL/LVECL operation. The MAX9320B is offered in industry-standard 8-pin TSSOP and SO packages.

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The MAX9317/MAX9317A/MAX9317B/MAX9317C are low-skew, dual 1-to-5 differential drivers designed for clock and data distribution. They reproduce the differential input at five LVDS outputs with a low output-to-output skew of 5ps. The MAX9317/MAX9317A are designed for low-voltage operation from a 2.375V to 2.625V power supply for use in 2.5V systems. The MAX9317B/MAX9317C operate from a 3.0V to 3.6V power supply for use in 3.3V systems. The MAX9317A/MAX9317C feature 50Ω input termination resistors to reduce component count. The MAX9317 family is available in 32-pin 7mm ✕ 7mm TQFP and space-saving 5mm ✕ 5mm QFN packages and operate across the extended temperature range of -40°C to +85°C.

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The MAX3890 serializer is an ideal device for converting 16-bit-wide, 155Mbps parallel data to 2.5Gbps serial data in ATM and SDH/SONET applications. It operates from a single +3.3V supply and accepts low-voltage differential-signal (LVDS) clock and data inputs to interface with high-speed digital circuitry, delivering positive-referenced emitter-coupled logic (PECL) serial data and clock outputs. The device features a fully integrated phase-locked loop (PLL) that synthesizes an internal 2.5GHz serial clock from a 155.52MHz, 77.76MHz, 51.84MHz, or 38.88MHz reference clock. A loopback data output is provided for system diagnostic testing. The MAX3890 is available in a 64-pin TQFP exposed-pad (EP) package, suitable for extended temperature range (-40°C to +85°C) applications.

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The MAX3880 is an integrated deserializer with clock recovery from Texas Instruments, which converts 2.488Gbps serial data to 16-bit-wide, 155Mbps parallel data for SDH/SONET applications. The device operates at a single +3.3V supply and accepts high-speed serial-data inputs and delivers low- voltage differential-signal (LVDS) parallel clock and data outputs for interfacing with digital circuitry. The MAX3880 includes a low-power clock recovery and data retiming function for 2.488Gbps applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input; the signal is then retimed by the recovered clock. The MAX3880’s jitter performance exceeds all SDH/SONET specifications. An additional 2.488Gbps serial input is available for system loopback diagnostic testing. The device also includes a TTL-compatible loss-of-lock (LOL) monitor and LVDS synchronization inputs that enable data realignment and reframing. The MAX3880 is available in the extended temperature range (-40°C to +85°C) in a 64-pin TQFP-EP (exposed pad) package.

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MAX3885 is a high-performance, low-power 2.488Gbps serial data to 16-bit 155Mbps parallel data deserializer from Maxim that operates from a single +3.3V supply and accepts PECL serial clock and data inputs, and delivers LVDS clock and data outputs for interfacing with high-speed digital circuitry.

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The MAX3892 is an ideal 4-bit-wide, 622Mbps parallel data to 2.5Gbps serial data serializer for DWDM and SONET/SDH applications.

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The MAX3680/MAX3680A deserializer is ideal for converting 622Mbps serial data to 8-bit-wide, 77Mbps parallel data in ATM and SDH/SONET applications. Operating from a single +3.3V supply, this device accepts PECL serial clock and data inputs, and delivers TTL clock and data outputs. The MAX3680 also provides a TTL synchronization input that enables data realignment and reframing. The MAX3680/MAX3680A is available in the extended-industrial temperature range (-40°C to +85°C), in a 28-pin SSOP package.

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The MAX3882A is a 2.488Gbps 1:4 demultiplexer with clock and data recovery and limiting amplifier ideal for converting 2.488Gbps serial data to 4-bit-wide, 622Mbps parallel data for SDH/SONET applications

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The MAX9205/MAX9207 serializers transform 10-bit-wide parallel LVCMOS/LVTTL data into a serial high-speed bus low-voltage differential signaling (LVDS) data stream. The serializers typically pair with deserializers like the MAX9206/MAX9208, which receive the serial output and transform it back to 10-bit-wide parallel data. The MAX9205/MAX9207 transmit serial data at speeds up to 400Mbps and 660Mbps, respectively, over PCB traces or twisted-pair cables. Since the clock is recovered from the serial data stream, clock-to-data and data-to-data skew that would be present with a parallel bus are eliminated. The serializers require no external components and few control signals. The input data strobe edge is selected by TCLK_R/F. PWRDN is used to save power when the devices are not in use. Upon power-up, a synchronization mode is activated, which is controlled by two SYNC inputs, SYNC1 and SYNC2. The MAX9205 can lock to a 16MHz to 40MHz system clock, while the MAX9207 can lock to a 40MHz to 66MHz system clock. The serializer output is held in high impedance until the device is fully locked to the local system clock, or when the device is in power-down mode. Both the devices operate from a single +3.3V supply, are specified for operation from -40°C to +85°C, and are available in 28-pin SSOP packages.

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MAX9206/MAX9208 are TI's high-speed serial bus low-voltage differential signaling (BLVDS) data stream deserializers that transform 10-bit-wide parallel LVCMOS/LVTTL data and clock into a serial BLVDS signal.

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The MAX9257A/MAX9258A is a fully programmable serializer/deserializer with UART/I2C control channel

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The MAX3353E is an I2C-compatible USB On-the-Go (OTG) regulated charge pump with switchable pullup/pull- down resistors. It allows peripherals and mobile devices such as PDAs, cellular phones, and digital cameras to be interconnected without a host PC. The MAX3353E enables a system with an integrated USB dual-role transceiver to function as a USB OTG dual-role device. The charge pump in the MAX3353E supplies VBUS power and signaling that is required by the transceiver as defined in On-the-Go Supplement: USB 2.0, Revision 1.0. The MAX3353E provides the switchable pullup and pulldown resistors on D+ and D- required for a dual-role device. The MAX3353E integrates a regulated charge pump, switchable pullup/pulldown resistors, and an I2C-compatible 2-wire serial interface. The device provides a detector to monitor ID status and operates with logic supply voltages (VL) between +1.65V and VCC and charge-pump supply voltages (VCC) from +2.6V to +5.5V. The charge pump supplies an OTG-compatible output on VBUS while sourcing 8mA output current. The MAX3353E enables USB OTG communication between digital logic parts that cannot supply or tolerate the +5V VBUS levels that USB OTG requires. By control- ling and measuring VBUS using internal comparators, this device supports USB OTG session request protocol (SRP) and host negotiation protocol (HNP). The MAX3353E has built-in ±15kV ESD protection circuitry to guard VBUS, ID_IN, D+, and D-. The MAX3353E is available in a 5 x 4 chi.

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The MAX5500/MAX5501 is a four-channel low-power, 12-bit digital-to-analog converter (DAC) from Texas Instruments, with four precision output amplifiers in a small, 20-pin package. Each negative input of the four precision amplifiers is externally accessible providing flexibility in gain configurations, remote sensing, and high output drive capacity, making the MAX5500/MAX5501 ideal for industrial process control applications. Other features include software shutdown, hardware shutdown lockout, an active-low reset which clears all registers and DACs to zero, a user-programmable logic output, and a serial-data output. Each DAC provides a double-buffered input organized as an input register followed by a DAC register. A 16-bit serial word loads data into each input register. The serial interface is compatible with SPI™/QSPI™/ MICROWIRE™. The serial interface allows the input and DAC registers to be updated independently or simultaneously with a single software command. The 3-wire interface simultaneously updates the DAC registers. All logic inputs are TTL/CMOS-logic compatible. The MAX5500 operates from a single +5V power supply, and the MAX5501 operates from a single +3V power supply. The MAX5500/MAX5501 are specified over the extended -40°C to +105°C temperature range. Applications include industrial process controls, automatic test equipment, microprocessor (μP)-controlled systems, motion control, digital offset and gain adjustment, remote industrial controls. Features include four 12-bit DACs, four precision output amplifiers, external negative inputs, software shutdown, hardware shutdown lockout, low-level reset, user-programmable logic output, serial data output, etc.

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MAX3420E is a USB peripheral device from Microchip that complies with USB 2.0 specification. It contains the necessary digital logic and analog circuitry to implement a full-speed USB peripheral.

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The MAX3421E USB peripheral/host controller contains the digital logic and analog circuitry necessary to implement a full-speed USB peripheral or a full-/low- speed host compliant to USB specification rev 2.0.

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MAX5156/MAX5157 Low-Power, Dual, 12-Bit Voltage-Output DACs with Configurable Outputs

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The MAX5104 is a low-power, serial, voltage-output, dual 12-bit digital-to-analog converter (DAC) that consumes only 500µA from a single +5V supply. This device features Rail-to-Rail® output swing and is available in a space- saving 16-pin QSOP package. To maximize the dynamic range, the DAC output amplifiers are configured with an internal gain of +2V/V. The 3-wire serial interface is SPI™/QSPI™/MICROWIRE™ compatible. Each DAC has a double-buffered input organized as an input register followed by a DAC register, which allows the input and DAC registers to be updated independently or simultaneously with a 16-bit serial word. Additional features include programmable power- down (2µA), hardware power-down lockout (PDL), a separate reference voltage input for each DAC that accepts AC and DC signals, and an active-low clear input (CL) that resets all registers and DACs to zero. These devices provide a programmable logic pin for added functionality, and a serial-data output pin for daisy chaining.

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The MAX3453E-MAX3456E ±15kV ESD-protected USB-compliant transceivers interface low-voltage ASICs with USB devices. The devices fully comply with USB 1.1 and USB 2.0 when operating at full (12Mbps) and low (1.5Mbps) speeds. The MAX3453E-MAX3456E operate with VL as low as +1.65V, ensuring compatibility with low-voltage ASICs. The MAX3453E-MAX3456E feature a logic-selectable suspend mode that reduces current consumption to less than 40µA. Integrated ±15kV ESD protection protects the USB D+ and D- bidirectional bus connections. The MAX3453E supports only full-speed (12Mbps) operation. The MAX3453E/MAX3454E feature an internal 1.5kΩ USB pullup resistor and an enumeration function that allows devices to logically disconnect while plugged in. The MAX3453E/MAX3455E provide a push-pull bus-detect (BD) output that asserts high when VBUS > +4.0V. The MAX3453E-MAX3456E operate over the extended temperature range (-40°C to +85°C) and are available in 14-pin TSSOP and 16-pin (3mm x 3mm) thin QFN packages.

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