7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide

Update: 18 October, 2023

The XADC is a high-performance 12-bit, 1 MSPS analog-to-digital converter (ADC) integrated in 7 Series FPGAs and Zynq-7000 SoCs. This user guide provides an overview of the XADC design and usage.

File format: PDF

Size: 2029 KB

MD5 Checksum: 71F55AC58EB8B048CAA57BBDF1A15923

Publication date: 18 October, 2023

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PDF Link: 7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide PDF

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