ST M68AF127B 1Mbit (128K x8) 5V Asynchronous SRAM Manual
Update: 30 September, 2023
M68AF127B is a 128K x 8-bit SRAM with OUTPUT ENABLE, supply voltage of 4.5 to 5.5V, equal cycle and access times of 55ns, low standby current, low VCC data retention voltage of 2V, TRI-STATE COMMON I/O, and low active and standby power.
Brand: ST
File format: PDF
Size: 141 KB
MD5 Checksum: 1603474F338B9BCED2E2E02B96C9EF26
Publication date: 07 May, 2012
Downloads: -
PDF Link: ST M68AF127B 1Mbit (128K x8) 5V Asynchronous SRAM Manual PDF