High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 M-Series FPGA IP User Guide

Update: 26 October, 2023

This guide introduces the features, design, and use of the High Bandwidth Memory (HBM2E) Interface Intel FPGA IP for Intel Agilex 7 M-Series FPGAs, and provides steps for creating HBM2E Interface FPGA IP designs using Intel® Quartus® Prime Design Suite.

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File format: PDF

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MD5 Checksum: 69C6A416E3A135D0A0BE94D191A05132

Publication date: 26 October, 2023

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PDF Link: High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 M-Series FPGA IP User Guide PDF